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PSIA-2722 Programmable Serial Interface AdapterHOME/PRODUCTS/ACCESSORIES/PSIA-2722

PSIA-2722

The PSIA adapter enables the connection of chip-level devices, such as analog-to-digital converters, digital-to-analog converters and sample rate converters, to Audio Precision 2700 Series and System Two Cascade Plus audio analyzers. Devices under test may have a variety of interface protocols, including different logic families and voltage levels, clock rates, word orientations, and formats.

Key features

User interface

The PSIA accommodates a wide variety of parameters to allow connection to virtually any device. These parameters are set within the analyzer control software on easy-to-use soft Transmitter and Receiver panels. PSIA setups are saved as part of the analyzer’s test file, ensuring repeatable and consistent measurements.

Convenient test development

The PSIA includes a Loop-Back mode to facilitate debugging. You can copy transmitter settings to the receiver with a single click for quick setup. The complete setup can be stored and recalled as part of your test file. Simplified setup controls for I2S are also provided.

Compact design

The PSIA is housed in a slim rack-width package that will conveniently sit on top of the host analyzer system. All logic lines are connected via front-panel BNC connectors to ensure data integrity. A handy oscilloscope probe jack is provided for each BNC signal. As several of the data ports can be in either input or output mode, LEDs are located above each BNC connector to indicate data direction.

Features

All device parameters are set using soft panels like the one illustrated here. Clock rates, word width and format, data channels and other parameters can be set and saved to allow easy and predictable device tests. Panels are included for transmit and receive functions with the ability to copy settings from one to the other.

  • Accommodation of a broad range of logic families and formats
  • I2S switch and simplified I2S setup controls
  • Internal or external master clock, bit clock, and word clock
  • Channel (subframe) clock output
  • N*Fs clock output
  • Settings for inversion, bit-wide pulse, and edge sync
  • Intuitive clock settings by rate or factor
  • 2, 4 or multiple channels are supported
  • Voltage levels for 5 V and 3.3 V TTL; 1.8 V, 2.4 V, and 3.3 V CMOS. Front panel voltage indicators
  • Variable data word width
  • MSB or LSB first
  • Left justified, right justified, or padded
  • Data padding with "0", "1", or sign / LSB
  • Loop-Back mode to help with debugging. You can copy transmitter settings to the receiver with a single click for quick setup.


Specs

Input / Output Impendence

SIGNAL

INPUT IMPEDANCE

OUTPUT IMPEDANCE

MAX V IN

Tx Master Clock

> 10 k

50

5.5 V

Tx NFs Clock

N/A

50

N/A

Tx Bit Clock

> 10 k

50

5.5 V

Tx Channel Clock

N/A

50

N/A

Tx Frame Clock

30 k

50

5.5 V

Tx Data

N/A

50

N/A

Rx Master Clock

30 k

50

5.5 V

Rx NFs Clock

N/A

50

N/A

Rx Bit Clock

> 10 k

50

5.5 V

Rx Channel Clock

N/A

50

N/A

Rx Frame Clock

30 k

50

5.5 V

Rx Data

30 k

N/A

5.5 V

 

Maximum Clock Frequency

Master clock in (external clock)

60 MHz

Master clock out

27.648 MHz (2700/Cascade instrument limit)

Bit clock in/out

25 MHz (using external master clock)

 

13.824 MHz (using instrument master clock)

Frame clock in/out

216 kHz

For APx users

The APx525 and APx585 Families support the functionality of the PSIA with the Digital Serial I/O (DSIO) option.


 


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